Skip to main content Skip to secondary navigation

Publications

Main content start
Herbst, S., Rutsch, G., Ecker, W., & Horowitz, M. (2021). An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. https://doi.org/10.1109/TCAD.2021.3102516
Huff, D., Dai, S., & Hanrahan, P. (2021). Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs. 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). https://doi.org/10.1109/FCCM51124.2021.00030
Liu, Q., Huff, D., Setter, J., Strange, M., Feng, K., Sreedhar, K., Wang, Z., Zhang, K., Horowitz, M., Raina, P., & Kjolstad, F. (2021). Compiling Halide Programs to Push-Memory Accelerators. arXiv.org. https://arxiv.org/abs/2105.12858
Melchert, J., Feng, K., Donovick, C., Daly, R., Barrett, C., Horowitz, M., Hanrahan, P., & Raina, P. (2021). Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis. arXiv. https://doi.org/arXiv:2104.14155v1
Scott, J., Niemetz, A., Preiner, M., Nejati, S., & Ganesh, V. (2021). MachSMT: A Machine Learning-based Algorithm Selector for SMT Solvers. Tools and Algorithms for the Construction and Analysis of Systems - 27th International Conference (TACAS 2021) , 303–325. https://doi.org/10.1007/978-3-030-72013-1_16
Niemetz, A., Preiner, M., Reynolds, A., Barrett, C., & Tinelli, C. (2021). Syntax-Guided Quantifier Instantiation. Tools and Algorithms for the Construction and Analysis of Systems - 27th International Conference (TACAS 2021), 145–163. https://doi.org/10.1007/978-3-030-72013-1_8
Niemetz, A., Preiner, M., Reynolds, A., Barrett, C., & Tinelli, C. (2021). On Solving Quantified Bit-Vector Constraints using Invertibility Conditions. Formal Methods in System Design. http://dx.doi.org/10.1007/s10703-020-00359-9
Kim, S.-J., Myers, Z., Herbst, S., Lim, B. C., & Horowitz, M. (2020). 20-GS/s 8b Analog-to-Digital Converter and 5-GHz Phase Interpolator for Open-Source Synthesizable High-Speed Link Applications. IEEE Solid-State Circuits Letters, 3, 518-521. https://doi.org/10.1109/LSSC.2020.3037823
Niemetz, A., & Preiner, M. (2020). Ternary Propagation-Based Local Search for More Bit-Precise Reasoning. Formal Methods in Computer Aided Design (FMCAD). http://dx.doi.org/10.34727/2020/isbn.978-3-85448-042-6_29
Truong, L., Herbst, S., Setaluri, R. ., Mann, M., Daly, R., Zhang, K., Donovick, C., Stanley, D., Horowitz, M., Barrett, C., & Hanrahan, P. (2020). fault: A Python Embedded Domain-Specific Language For Metaprogramming Portable Hardware Verification Components. CAV 2020: 32nd International Conference on Computer-Aided Verification July 2020. https://doi.org/10.1007/978-3-030-53288-8_19
Bahr, R., Barrett, C., Bhagdikar, N., Carsello, A., Daly, R., Donovick, C., Durst, D., Fatahalian, K., Feng, K., Hanrahan, P., Hofstee, T., Horowitz, M., Huff, D., Kjolstad, F., Kong, T., Liu, Q., Mann, M., Melchert, J., Nayak, A., Niemetz, A., Nyengele, G., Raina, P., Richardson, S., Setaluri, R., Setter, J., Sreedhar, K., Strange, M., Thomas, J., Torng, C., Truong, L., Tsiskaridze, N., & Zhang, K. (2020). Creating an Agile Hardware Design Flow. 2020 57th ACM/IEEE Design Automation Conference (DAC). http://dx.doi.org/10.1109/DAC18072.2020.9218553
Kim, S.-J., Myers, Z., Herbst, S., Lim, B., & Horowitz, M. (2020). Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator. 2020 IEEE Symposium on VLSI Circuits. https://doi.org/10.1109/VLSICircuits18222.2020.9162800
Durst, D., Feldman, M., Huff, D., Akeley, D., Daly, R., Bernstein, G., Patrignani, M., Fatahalian, K., & Hanrahan, P. (2020). Type-Directed Scheduling of Streaming Accelerators. Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation (PLDI ’20). https://doi.org/10.1145/3385412.3385983
Nayak, A., Zhang, K., Setaluri, R., Carsello, A., Mann, M., Richardson, S., Bahr, R., Hanrahan, P., Horowitz, M., & Raina, P. (2020). A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs. 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE). https://doi.org/10.23919/DATE48585.2020.9116477
Yang, X., Gao, M., Liu, Q., Setter, J., Pu, J., Nayak, A., Bell, S., Cao, K., Ha, H., Raina, P., Kozyrakis, C., & Horowitz, M. (2020). Interstellar: Using Halide’s Scheduling Language to Analyze DNN Accelerators. ASPLOS ’20: Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, 369–383. https://doi.org/10.1145/3373376.3378514
Truong, L., & Hanrahan, P. (2019). A Golden Age of Hardware Description Languages: Applying Programming Language Techniques to Improve Design Productivity. 3rd Summit on Advances in Programming Languages (SNAPL 2019). https://doi.org/10.4230/LIPIcs.SNAPL.2019.7
Mullapudi, R. M., Chen, S., Zhang, K., Ramanan, D., & Fatahalian, K. (2019). Online Model Distillation for Efficient Video Inference. 2019 IEEE/CVF International Conference on Computer Vision (ICCV), 3572-3581. https://doi.org/10.1109/ICCV.2019.00367
Niemetz, A., Preiner, M., Reynolds, A., Zohar, Y., Barrett, C., & Tinelli, C. (2019). Towards Bit-Width-Independent Proofs in SMT Solvers. In: Fontaine P. (eds) Automated Deduction – CADE 27. CADE 2019. Lecture Notes in Computer Science, vol 11716. Springer, Cham. https://doi.org/10.1007/978-3-030-29436-6_22
Reynolds, A., Nötzli, A., Barrett, C., & Tinelli, C. (2019). High-Level Abstractions for Simplifying Extended String Constraints in SMT. In: Dillig I., Tasiran S. (eds) Computer Aided Verification. CAV 2019. Lecture Notes in Computer Science, vol 11562. Springer, Cham. . https://doi.org/10.1007/978-3-030-25543-5_2
Brain, M., Niemetz, A., Preiner, M., Reynolds, A., Barrett, C., & Tinelli, C. (2019). Invertibility Conditions for Floating-Point Formulas. In: Dillig I., Tasiran S. (eds) Computer Aided Verification. CAV 2019. Lecture Notes in Computer Science, vol 11562. Springer, Cham. https://doi.org/10.1007/978-3-030-25543-5_8