Publications

Feng, K., Kong, T., Koul, K., Melchert, J., Carsello, A., Liu, Q., Nyengele, G., Strange, M., Zhang, K., Nayak, A., Setter, J., Thomas, J., Sreedhar, K., Chen, P.-H., Bhagdikar, N., Myers, Z., D’Agostino, B., Joshi, P., Richardson, S., Torng, C., Horowitz, M., & Raina, P. (2023). Amber: A 16-nm System-on-Chip With a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. IEEE Journal of Solid-State Circuits. https://doi.org/10.1109/JSSC.2023.3313116

Donovick, C., Daly, R., Melchert, J., Truong, L., Raina, P., Hanrahan, P., & Barrett, C. (2023). PEak: A Single Source of Truth for Hardware Design and Verification. arXiv. https://doi.org/10.48550/arXiv.2308.13106

Chen, P.-H., Tsao, C., & Raina, P. (2023). An Open-Source 4×8 Coarse-Grained Reconfigurable Array Using SkyWater 130 nm Technology and Agile Hardware Design Flow. 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5. https://doi.org/10.1109/ISCAS46773.2023.10182052

Horowitz, M., & Richardson, S. (2023). Extracting Information from Rich Video Streams: An Agile Software/Hardware Approach. https://apps.dtic.mil/sti/citations/trecms/AD1200191

Melchert, J., Zhang, K., Mei, Y., Horowitz, M., Torng, C., & Raina, P. (2023). Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays. IEEE Computer Architecture Letters, 22, 45-48. https://doi.org/10.1109/LCA.2023.3268126

Hsu, O., Strange, M., Sharma, R., Won, J., Olukotun, K., Emer, J., Horowitz, M., & Kjolstad, F. (2023). The Sparse Abstract Machine. ASPLOS 2023: Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 3. https://doi.org/https://doi.org/10.1145/3582016.3582051

Liu, Q., Setter, J., Huff, D., Strange, M., Feng, K., Horowitz, M., Raina, P., & Kjolstad, F. (2023). Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators. ACM Transactions on Architecture and Code Optimization (TACO). https://doi.org/10.1145/3572908

Melchert, J., Feng, K., Donovick, . C., Daly, . R., Sharma, R., Barrett, C., Horowitz, M., Hanrahan, P., & Raina, P. (2023). APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. ASPLOS 2023: Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 3, 33–45. https://doi.org/https://doi.org/10.1145/3582016.3582070

Koul, K., Melchert, J., Sreedhar, K., Truong
, L., Nyengele
, G., Zhang
, K., Liu
, Q., Setter
, J., Chen
, P.-H., Mei
, Y., Strange
, M., Daly
, R., Donovick
, C., Carsello
, A., Kong, T., Feng, K., Huff, D., Nayak, A., Setaluri
, R., Thomas
, J., Bhagdikar
, N., Durst
, D., Myers
, Z., Tsiskaridze
, N., Richardson
, S., Bahr
, R., Fatahalian
, K., Hanrahan
, P., Barrett, C., Horowitz, M., Torng
, C., Kjolstad
, F., & Raina
, P. (2023). AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers. ACM Transactions on Embedded Computing Systems, 22(2). https://doi.org/10.1145/3534933

Kong, T., Koul, K., Raina, P., Horowitz, M., & Torng, C. (2023). Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays. arXiv. https://doi.org/10.48550/arXiv.2301.00861

Sreedhar, K., Clemons, J., Venkatesan, R., Keckler, S., & Horowitz, M. (2022). Enabling and Accelerating Dynamic Vision Transformer Inference for Real-Time Applications. arXiv. https://doi.org/10.48550/arXiv.2212.02687

Melchert, J., Mei, Y., Koul, K., Liu, Q., Horowitz, M., & Raina, P. (2022). Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays. arXiv. https://doi.org/10.48550/arXiv.2211.13182

Daly, R., Donovick, C., Melchert, J., Setaluri, R., Bullock, N., Raina, P., Barrett, C., & Hanrahan, P. (2022). Synthesizing Instruction Selection Rewrite Rules from RTL using SMT. Formal Methods in Computer-Aided Design (FMCAD), 139-150. https://doi.org/10.34727/2022/isbn.978-3-85448-053-2_20

Nayak, A., Zhang, K., Setaluri, R., Carsello, A., Mann, M., Torng, C., Richardson, S., Bahr, R., Hanrahan, P., Horowitz, M., & Raina, P. (2022). Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains . ACM Transactions on Reconfigurable Technology and Systems. https://doi.org/10.1145/3558394

Feng, K., Carsello, A., Kong, T., Koul, K., Liu, Q., Melchert, J., Nyengele, G., Strange, M., Zhang, K., Nayak, A., Setter, J., Thomas, J., Sreedhar, K., Chen, P.-H., Bhagdikar, N., Myers, Z., D’Agostino, B., Joshi, P., Richardson, S., Bahr, R., Torng, C., Horowitz, M., & Raina, P. (2022). Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration. 2022 IEEE Hot Chips 34 Symposium (HCS). https://doi.ieeecomputersociety.org/10.1109/HCS55958.2022.9895616

Carsello, A., Thomas, J., Nayak, A., Chen, P.-H., Horowitz, M., Raina, P., & Torng, C. (2022). mflowgen: a modular flow generator and ecosystem for community-driven physical design. DAC ’22: Proceedings of the 59th ACM/IEEE Design Automation Conference, 1339-1342. https://doi.org/10.1145/3489517.3530633

Carsello, A., Feng, K., Kong, T., Koul, K., Liu, Q., Melchert, J., Nyengele, G., Strange, M., Zhang, K., Nayak, A., Setter, J., Thomas, J., Sreedhar, K., Chen, P.-H., Bhagdikar, N., Myers, Z., D’Agostino, B., Joshi, P., Richardson, S., Bahr, R., Torng, C., Horowitz, M., & Raina, P. (2022). Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 70-71. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830509

Barbosa, H., Barrett, C., Brain, M., Kremer, G., Lachnitt, H., Mann, M., Mohamed, A., Mohamed, M., Niemetz, A., Nötzli, A., Ozdemir, A., Preiner, M., Reynolds, A., Sheng, Y., Tinelli, C., & Zohar, Y. (2022). cvc5: A Versatile and Industrial-Strength SMT Solver. International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2022), pp. 415-442. Springer, Cham. https://doi.org/10.1007/978-3-030-99524-9_24

Zhang, K., Asgar, Z., & Horowitz, M. (2022). Bringing Source-Level Debugging Frameworks to Hardware Generators. arXiv. https://doi.org/https://doi.org/10.48550/arXiv.2203.05742

Sreedhar, K., Horowitz, M., & Torng, C. (2022). A Fast Large-Integer Extended GCD Algorithm and Hardware Design for Verifiable Delay Functions and Modular Inversion. Conference on Cryptographic Hardware and Embedded Systems (CHES 2022). https://eprint.iacr.org/2021/1292