2020
20-GS/s 8b Analog-to-Digital Converter and 5-GHz Phase Interpolator for Open-Source Synthesizable High-Speed Link Applications
Sung-Jin Kim, Zachary Myers, Steven Herbst, Byong Chan Lim, Mark Horowitz
IEEE Solid-State Circuits Letters
Boosting Mixed-signal Design Productivity with FPGA-based Methods Throughout the Chip Design Process
Gabriel Rutsch, Simone Fontanesi, Steven Tan Hee Yeng, Andrea Possemato, Gaetano Formato, Wolfgang Ecker, Steven Herbst, Mark Horowitz
DVCon Europe 2020
Ternary Propagation-Based Local Search for More Bit-Precise Reasoning
Aina Niemetz, Mathias Preiner
Formal Methods in Computer Aided Design (FMCAD)
fault: A Python Embedded Domain-Specific Language For Metaprogramming Portable Hardware Verification Components
Lenny Truong, Steven Herbst, Rajsekhar Setaluri, Makai Mann, Ross Daly, Keyi Zhang, Caleb Donovick, Daniel Stanley, Mark Horowitz, Clark Barrett, Pat Hanrahan
CAV 2020: 32nd International Conference on Computer-Aided Verification July 2020
Creating an Agile Hardware Design Flow
Rick Bahr, Clark Barrett, Nikhil Bhagdikar, Alex Carsello, Ross Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Fredrik Kjolstad, Taeyoung Kong, Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Raj Setaluri, Jeff Setter, Kavya Sreedhar, Maxwell Strange, James Thomas, Christopher Torng, Leonard Truong, Nestan Tsiskaridze, Keyi Zhang
Design Automation Conference 2020
Type-Directed Scheduling of Streaming Accelerators
David Durst, Matthew Feldman, Dillon Huff, David Akeley, Ross Daly, Gilbert Bernstein, Marco Patrignani, Kayvon Fatahalian, Pat Hanrahan
Proceedings of the 41st ACM SIGPLAN International Confer- ence on Programming Language Design and Implementation (PLDI ’20)
Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator
Sung-Jin Kim, Zachary Myers, Steven Herbst, Byong Chan Lim, Mark Horowitz
VLSI 2020: Symposia on VLSI Technology and Circuits June 2020
Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators
Xuan Yang, Mingyu Gao, Qiaoyi Liu, Jeff Setter, Jing Pu, Ankita Nayak, Steven Bell, Kaidi Cao, Heonjae Ha, Priyanka Raina, Christos Kozyrakis, Mark Horowitz
ASPLOS '20: Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems
A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs
Ankita Nayak, Keyi Zhang, Raj Setaluri, Alex Carsello, Makai Mann, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina
Design, Automation and Test in Europe Conference (DATE)
Fast FPGA Emulation of Analog Dynamics in Digitally-driven Systems
Steven Herbst, Byong Chan Lim, Mark Horowitz
ICCAD '18: Proceedings of the International Conference on Computer-Aided Design
2019
Towards Bit-Width-Independent Proofs in SMT Solvers
Aina Niemetz, Mathias Preiner, Andrew Reynolds, Yoni Zohar, Clark Barrett, Cesare Tinelli
Automated Deduction - CADE 27 - 27th International Conference on Automated Deduction, Natal, Brazil, August 27-30, 2019, Proceedings, 2019.
Creating An Agile Hardware Flow
Rick Bahr, Clark Barrett, Nikhil Bhagdikar, Alex Carsello, Nate Chizgi, Ross G Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Taeyoung Kong, Zheng Liang, Qiaoyi Liu, Makai Mann, Zachary Alexander Myers, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Raj Setaluri, Jeff Setter, Daniel Stanley, Maxwell Strange, Charles Tsao, James Thomas, Leonard Truong, Xuan Yang, Keyi Zhang
HotChips 2019
Future Technology: Domain Specific System on Chip (DSSoC)
Electronics Resurgence Initiative (ERI) Summit
Invertibility Conditions for Floating-Point Formulas
Martin Brain, Aina Niemetz, Mathias Preiner, Andrew Reynolds, Clark Barrett, Cesare Tinelli
Computer Aided Verification
A Golden Age of Hardware Description Languages: Applying Programming Language Techniques to Improve Design Productivity
Lenny Truong, Pat Hanrahan
3rd Summit on Advances in Programming Languages (SNAPL 2019)
Learning to Optimize Halide with Tree Search and Random Programs
Andrew Adams, Karima Ma, Luke Anderson, Riyadh Baghdadi, Tzu-Mao Li, Michaël Gharbi, Benoit Steiner, Steven Johnson, Kayvon Fatahalian, Frédo Durand, Jonathan Ragan-Kelley
ACM Transactions on Graphics (TOG)
DRAT-based Bit-Vector Proofs in CVC4
Alex Ozdemir, Aina Niemetz, Mathias Preiner, Yoni Zohar, Clark Barrett
Theory and Applications of Satisfiability Testing – SAT 2019
Syntax-Guided Rewrite Rule Enumeration for SMT Solvers
Andres Nötzli, Andrew Reynolds, Haniel Barbosa, Aina Niemetz, Mathias Preiner, Clark Barrett, Cesare Tinelli
Theory and Applications of Satisfiability Testing – SAT 2019
TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators
Mingyu Gao, Xuan Yang, Jing Pu, Mark Horowitz, Christos Kozyrakis
ASPLOS '19 Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems
2018
Using Runtime Circuit Specialization to Accelerate Simulations of Reconfigurable Architectures
Dillon Huff, Pat Hanrahan
2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)