CGRA Architecture and Tools
A Coarse Grain Reconfigurable Architecture (CGRA) is a reconfigurable architecture that operates on coarser granularity than traditional reconfigurable architectures such as FPGA. It contains an array of tiles, where each tile is either a processing element (PE) or a memory (MEM) tile. Our PE tiles perform arithmetic on 1-bit and 16-bit signals, while MEM tiles store and push data. The tiles communicate through configurable interconnect.
We have developed three different domain-specific languages (DSL) to generate individual components for the CGRA: PEak for PE tiles, Lake for MEM tiles, and Canal for the interconnect. Each language serves as a single source of truth for its domain, and can produce both RTL and collateral information for other tools.
PEak is a python-embedded DSL that describes a PE's instruction set architecture (ISA) as well as its functional model. The main idea behind PEak is to support multiple interpretations of the same PEak object, using it as functional model, RTL generator, or symbolic representation based on different evaluation contexts. Since PEak has precise formal semantics, it can generate mapper rewrite rules automatically.
Lake builds on top of a unified buffer model, where memory access patterns can be predetermined from source code by the compiler, and we can use the "push" the data into output ports, thus being more efficient than the traditional ready-valid method. By choosing customizable parameters for the unified buffer, we can map lots of applications with different memory access patterns into the same hardware. Lake can also optimize the RTL based on underlying technology.
Canal is a DSL that constructs the interconnect through its internal directed-graph representation. Its choice of IR allows it to use multiple passes to transform the interconnect to enable more complex and heterogeneous designs. Canal can generate Place and Route (PnR) collateral automatically based on its IR, and the PnR tool can use this collateral to map the application to the CGRA. Canal can introspect PEak and Lake descriptions and automatically create the necessary hardware for connection.