Automatic pipelining for CGRA Applications - Techniques, Analysis and Future Directions

Speaker: Jackson Melchert, PhD Student, Stanford University
Date: February 9, 2022

Running applications on our CGRA at a high clock frequency is critical in achieving competitive runtime and EDP comparisons with application specific accelerators. To pipeline applications effectively, we need an understanding of the delay contributions throughout our CGRA and automated techniques to break the longest paths. In this talk, I will describe various automated application pipelining techniques that we have implemented and tested on our chip, along with plans for integrating what we’ve learned from our analysis of these techniques into hardware and compiler changes for our future chips.